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| #include "rc522_driver.h" #include "hal_gpio.h" #include "hal_spi.h" #include "config.h" #include <stdio.h> #include <string.h>
#define PCD_COMMAND_REG 0x01 #define PCD_FIFO_DATA_REG 0x09 #define PCD_FIFO_LEVEL_REG 0x0A #define PCD_STATUS2_REG 0x08 #define PCD_CONTROL_REG 0x0C #define PCD_BIT_FRAMING_REG 0x0D #define PCD_COLL_REG 0x0E #define PCD_MODE_REG 0x2A #define PCD_TX_MODE_REG 0x2B #define PCD_RX_MODE_REG 0x2C #define PCD_TX_CONTROL_REG 0x14 #define PCD_CARD_DETECT_REG 0x1F
#define PCD_IDLE 0x00 #define PCD_AUTHENT 0x0E #define PCD_RECEIVE 0x08 #define PCD_TRANSMIT 0x04 #define PCD_TRANSCEIVE 0x0C #define PCD_RESETPHASE 0x0F #define PCD_CALCCRC 0x03 #define PCD_MFAUTHENT 0x12 #define PCD_SOFTPOWERDOWN 0x1A
static uint8_t rc522_nss_pin; static uint8_t rc522_rst_pin;
bool rc522_init(uint8_t nss_pin, uint8_t rst_pin) { rc522_nss_pin = nss_pin; rc522_rst_pin = rst_pin;
hal_gpio_init(rc522_nss_pin, GPIO_MODE_OUTPUT); hal_gpio_init(rc522_rst_pin, GPIO_MODE_OUTPUT);
hal_gpio_set_level(rc522_rst_pin, GPIO_LEVEL_LOW); hal_gpio_set_level(rc522_nss_pin, GPIO_LEVEL_HIGH);
hal_gpio_set_level(rc522_rst_pin, GPIO_LEVEL_HIGH); esp_rom_delay_us(1000);
rc522_reset();
rc522_write_reg(PCD_T_MODE_REG, 0x8D); rc522_write_reg(PCD_T_PRESCALER_REG, 0x3E); rc522_write_reg(PCD_TRELOAD_H_REG, 0x00); rc522_write_reg(PCD_TRELOAD_L_REG, 0x1E); rc522_write_reg(PCD_TX_AUTO_REG, 0x40); rc522_write_reg(PCD_MODE_REG, 0x3D);
rc522_antenna_on();
if (DEBUG_ENABLED) { printf("RC522 Driver: RC522 initialized (NSS:%d, RST:%d)\n", nss_pin, rst_pin); } return true; }
void rc522_reset(void) { rc522_write_reg(PCD_COMMAND_REG, PCD_RESETPHASE); }
void rc522_write_reg(uint8_t addr, uint8_t val) { hal_gpio_set_level(rc522_nss_pin, GPIO_LEVEL_LOW); hal_spi_transfer((addr << 1) & 0x7E); hal_spi_transfer(val); hal_gpio_set_level(rc522_nss_pin, GPIO_LEVEL_HIGH); if (DEBUG_ENABLED) { printf("RC522 Driver: Write Reg 0x%02X = 0x%02X\n", addr, val); } }
uint8_t rc522_read_reg(uint8_t addr) { uint8_t val; hal_gpio_set_level(rc522_nss_pin, GPIO_LEVEL_LOW); hal_spi_transfer(((addr << 1) & 0x7E) | 0x80); val = hal_spi_transfer(0x00); hal_gpio_set_level(rc522_nss_pin, GPIO_LEVEL_HIGH); if (DEBUG_ENABLED) { printf("RC522 Driver: Read Reg 0x%02X = 0x%02X\n", addr, val); } return val; }
void rc522_set_bitmask(uint8_t reg, uint8_t mask) { uint8_t tmp = rc522_read_reg(reg); rc522_write_reg(reg, tmp | mask); }
void rc522_clear_bitmask(uint8_t reg, uint8_t mask) { uint8_t tmp = rc522_read_reg(reg); rc522_write_reg(reg, tmp & (~mask)); }
void rc522_antenna_on(void) { rc522_set_bitmask(PCD_TX_CONTROL_REG, 0x03); }
void rc522_antenna_off(void) { rc522_clear_bitmask(PCD_TX_CONTROL_REG, 0x03); }
uint8_t rc522_request(uint8_t reqMode, uint8_t *TagType) { uint8_t status; uint32_t unLen; uint8_t comMF522Buf[8];
rc522_clear_bitmask(PCD_STATUS2_REG, 0x08); rc522_write_reg(PCD_FIFO_LEVEL_REG, 0x00);
rc522_write_reg(PCD_COMMAND_REG, PCD_IDLE);
rc522_write_reg(PCD_FIFO_DATA_REG, reqMode); rc522_write_reg(PCD_COMMAND_REG, PCD_TRANSCEIVE);
rc522_set_bitmask(PCD_BIT_FRAMING_REG, 0x80);
uint32_t i = 2000; while ((i!=0) && !((rc522_read_reg(PCD_STATUS2_REG))&0x01) && !(rc522_read_reg(PCD_FIFO_LEVEL_REG) > 0)) { i--; esp_rom_delay_us(1); } rc522_clear_bitmask(PCD_BIT_FRAMING_REG, 0x80);
if(i==0) { status = 0x01; goto end; }
status = 0x00; if (rc522_read_reg(PCD_COLL_REG) & 0x01) { status = 0x01; goto end; }
unLen = rc522_read_reg(PCD_FIFO_LEVEL_REG); if (unLen > sizeof(comMF522Buf)) { status = 0x01; goto end; }
for (i=0; i<unLen; i++) { comMF522Buf[i] = rc522_read_reg(PCD_FIFO_DATA_REG); } memcpy(TagType, comMF522Buf, unLen);
end: rc522_write_reg(PCD_COMMAND_REG, PCD_IDLE); return status; }
uint8_t rc522_anticoll(uint8_t *serNum) { uint8_t status; uint8_t i; uint8_t serNumCheck=0; uint32_t unLen;
rc522_write_reg(PCD_COLL_REG,0x80);
rc522_clear_bitmask(PCD_STATUS2_REG, 0x08); rc522_write_reg(PCD_FIFO_LEVEL_REG, 0x00);
rc522_write_reg(PCD_FIFO_DATA_REG, 0x93); rc522_write_reg(PCD_COMMAND_REG, PCD_TRANSCEIVE);
rc522_set_bitmask(PCD_BIT_FRAMING_REG, 0x80);
i = 2000; while ((i!=0) && !((rc522_read_reg(PCD_STATUS2_REG))&0x01) && !(rc522_read_reg(PCD_FIFO_LEVEL_REG) > 0)) { i--; esp_rom_delay_us(1); } rc522_clear_bitmask(PCD_BIT_FRAMING_REG, 0x80);
if(i==0) { status = 0x01; goto end_anticoll; }
status = 0x00; if (rc522_read_reg(PCD_COLL_REG) & 0x01) { status = 0x01; goto end_anticoll; }
unLen = rc522_read_reg(PCD_FIFO_LEVEL_REG); if (unLen != 5) { status = 0x01; goto end_anticoll; }
for (i=0; i<5; i++) { serNum[i] = rc522_read_reg(PCD_FIFO_DATA_REG); serNumCheck ^= serNum[i]; }
if (serNumCheck != 0) { status = 0x01; } else { status = 0x00; }
end_anticoll: rc522_write_reg(PCD_COLL_REG,0x00); rc522_write_reg(PCD_COMMAND_REG, PCD_IDLE); return status; }
void rc522_select_tag(uint8_t *serNum) { uint8_t i; uint8_t status; uint8_t size; uint32_t recvBits; uint8_t buffer[9];
rc522_clear_bitmask(PCD_STATUS2_REG, 0x08); rc522_write_reg(PCD_FIFO_LEVEL_REG, 0x00); rc522_write_reg(PCD_COMMAND_REG, PCD_IDLE);
buffer[0] = 0x93; buffer[1] = 0x70; buffer[6] = 0; for (i=0; i<5; i++) { buffer[i+2] = serNum[i]; buffer[6] ^= buffer[i+2]; }
rc522_calculate_crc(buffer, 7, &buffer[7]);
rc22_clear_bitmask(PCD_STATUS2_REG, 0x08); rc522_write_reg(PCD_FIFO_LEVEL_REG, 0x00);
for (i=0; i<9; i++) { rc522_write_reg(PCD_FIFO_DATA_REG, buffer[i]); }
rc522_write_reg(PCD_COMMAND_REG, PCD_TRANSCEIVE);
rc522_set_bitmask(PCD_BIT_FRAMING_REG, 0x80);
i = 2000; while ((i!=0) && !((rc522_read_reg(PCD_STATUS2_REG))&0x01) && !(rc522_read_reg(PCD_FIFO_LEVEL_REG) > 0)) { i--; esp_rom_delay_us(1); } rc522_clear_bitmask(PCD_BIT_FRAMING_REG, 0x80);
if(i==0) { status = 0x01; goto end_select; }
status = 0x00; if (rc522_read_reg(PCD_COLL_REG) & 0x01) { status = 0x01; goto end_select; }
size = rc522_read_reg(PCD_FIFO_LEVEL_REG); if (size != 1) { status = 0x01; goto end_select; }
status = rc522_read_reg(PCD_FIFO_DATA_REG); if ((status & 0x0F) != 0x0A) { status = 0x01; } else { status = 0x00; }
end_select: rc522_write_reg(PCD_COMMAND_REG, PCD_IDLE); }
uint8_t rc522_auth(uint8_t authMode, uint8_t BlockAddr, uint8_t *Sectorkey, uint8_t *serNum) { uint8_t status; uint8_t i; uint8_t recvBits; uint8_t buffer[12];
buffer[0] = authMode; buffer[1] = BlockAddr; memcpy(&buffer[2], Sectorkey, 6); memcpy(&buffer[8], serNum, 4);
rc522_clear_bitmask(PCD_STATUS2_REG, 0x08); rc522_write_reg(PCD_FIFO_LEVEL_REG, 0x00);
for (i=0; i<12; i++) { rc522_write_reg(PCD_FIFO_DATA_REG, buffer[i]); }
rc522_write_reg(PCD_COMMAND_REG, PCD_AUTHENT);
i = 2000; while ((i!=0) && !((rc522_read_reg(PCD_STATUS2_REG))&0x01) && !(rc522_read_reg(PCD_FIFO_LEVEL_REG) > 0)) { i--; esp_rom_delay_us(1); }
if(i==0) { return 0x01; }
if (!(rc522_read_reg(PCD_STATUS2_REG) & 0x04)) { return 0x01; }
return 0x00; }
uint8_t rc522_read(uint8_t blockAddr, uint8_t *recvData) { uint8_t status; uint8_t i; uint32_t unLen; uint8_t buffer[2];
buffer[0] = 0x30; buffer[1] = blockAddr;
rc522_calculate_crc(buffer, 2, &buffer[2]);
rc522_clear_bitmask(PCD_STATUS2_REG, 0x08); rc522_write_reg(PCD_FIFO_LEVEL_REG, 0x00);
rc522_write_reg(PCD_FIFO_DATA_REG, buffer[0]); rc522_write_reg(PCD_FIFO_DATA_REG, buffer[1]); rc522_write_reg(PCD_FIFO_DATA_REG, buffer[2]); rc522_write_reg(PCD_FIFO_DATA_REG, buffer[3]);
rc522_write_reg(PCD_COMMAND_REG, PCD_TRANSCEIVE);
rc522_set_bitmask(PCD_BIT_FRAMING_REG, 0x80);
i = 2000; while ((i!=0) && !((rc522_read_reg(PCD_STATUS2_REG))&0x01) && !(rc522_read_reg(PCD_FIFO_LEVEL_REG) > 0)) { i--; esp_rom_delay_us(1); } rc522_clear_bitmask(PCD_BIT_FRAMING_REG, 0x80);
if(i==0) { status = 0x01; goto end_read; }
status = 0x00; if (rc522_read_reg(PCD_COLL_REG) & 0x01) { status = 0x01; goto end_read; }
unLen = rc522_read_reg(PCD_FIFO_LEVEL_REG); if (unLen != 16) { status = 0x01; goto end_read; }
for (i=0; i<16; i++) { recvData[i] = rc522_read_reg(PCD_FIFO_DATA_REG); }
end_read: rc522_write_reg(PCD_COMMAND_REG, PCD_IDLE); return status; }
uint8_t rc522_write(uint8_t blockAddr, uint8_t *writeData) { uint8_t status; uint8_t i; uint8_t recvBits; uint8_t buffer[18];
buffer[0] = 0xA0; buffer[1] = blockAddr;
rc522_calculate_crc(buffer, 2, &buffer[2]);
rc522_clear_bitmask(PCD_STATUS2_REG, 0x08); rc522_write_reg(PCD_FIFO_LEVEL_REG, 0x00);
rc522_write_reg(PCD_FIFO_DATA_REG, buffer[0]); rc522_write_reg(PCD_FIFO_DATA_REG, buffer[1]); rc522_write_reg(PCD_FIFO_DATA_REG, buffer[2]); rc522_write_reg(PCD_FIFO_DATA_REG, buffer[3]);
rc522_write_reg(PCD_COMMAND_REG, PCD_TRANSCEIVE);
rc522_set_bitmask(PCD_BIT_FRAMING_REG, 0x80);
i = 2000; while ((i!=0) && !((rc522_read_reg(PCD_STATUS2_REG))&0x01) && !(rc522_read_reg(PCD_FIFO_LEVEL_REG) > 0)) { i--; esp_rom_delay_us(1); } rc522_clear_bitmask(PCD_BIT_FRAMING_REG, 0x80);
if(i==0) { status = 0x01; goto end_write; }
status = 0x00; if (rc522_read_reg(PCD_COLL_REG) & 0x01) { status = 0x01; goto end_write; }
status = rc522_read_reg(PCD_FIFO_DATA_REG); if ((status & 0x0F) != 0x0A) { status = 0x01; goto end_write; }
rc22_clear_bitmask(PCD_STATUS2_REG, 0x08); rc522_write_reg(PCD_FIFO_LEVEL_REG, 0x00);
for (i=0; i<16; i++) { rc522_write_reg(PCD_FIFO_DATA_REG, writeData[i]); } rc522_calculate_crc(writeData, 16, &buffer[16]); rc522_write_reg(PCD_FIFO_DATA_REG, buffer[16]); rc522_write_reg(PCD_FIFO_DATA_REG, buffer[17]);
rc522_write_reg(PCD_COMMAND_REG, PCD_TRANSCEIVE);
rc522_set_bitmask(PCD_BIT_FRAMING_REG, 0x80);
i = 2000; while ((i!=0) && !((rc522_read_reg(PCD_STATUS2_REG))&0x01) && !(rc522_read_reg(PCD_FIFO_LEVEL_REG) > 0)) { i--; esp_rom_delay_us(1); } rc522_clear_bitmask(PCD_BIT_FRAMING_REG, 0x80);
if(i==0) { status = 0x01; goto end_write; }
status = 0x00; if (rc522_read_reg(PCD_COLL_REG) & 0x01) { status = 0x01; goto end_write; }
end_write: rc522_write_reg(PCD_COMMAND_REG, PCD_IDLE); return status; }
void rc522_halt(void) { uint8_t status; uint32_t unLen; uint8_t buffer[4];
buffer[0] = 0x50; buffer[1] = 0x00;
rc522_calculate_crc(buffer, 2, &buffer[2]);
rc522_clear_bitmask(PCD_STATUS2_REG, 0x08); rc522_write_reg(PCD_FIFO_LEVEL_REG, 0x00);
rc522_write_reg(PCD_FIFO_DATA_REG, buffer[0]); rc522_write_reg(PCD_FIFO_DATA_REG, buffer[1]); rc522_write_reg(PCD_FIFO_DATA_REG, buffer[2]); rc522_write_reg(PCD_FIFO_DATA_REG, buffer[3]);
rc522_write_reg(PCD_COMMAND_REG, PCD_TRANSCEIVE);
rc522_set_bitmask(PCD_BIT_FRAMING_REG, 0x80);
esp_rom_delay_us(1000);
rc522_clear_bitmask(PCD_BIT_FRAMING_REG, 0x80); rc522_write_reg(PCD_COMMAND_REG, PCD_IDLE); }
void rc522_calculate_crc(uint8_t *pIndata, uint8_t len, uint8_t *pOutData) { uint8_t i, n; rc522_clear_bitmask(PCD_DIV_IRQ_REG, 0x04); rc522_set_bitmask(PCD_FIFO_LEVEL_REG, 0x00); rc522_write_reg(PCD_COMMAND_REG, PCD_IDLE); rc522_write_reg(PCD_FIFO_DATA_REG, 0x00);
for (i=0; i<len; i++) { rc522_write_reg(PCD_FIFO_DATA_REG, *(pIndata+i)); } rc522_write_reg(PCD_COMMAND_REG, PCD_CALCCRC);
i = 0xFF; do { n = rc522_read_reg(PCD_DIV_IRQ_REG); i--; } while ((i!=0) && !(n&0x04));
pOutData[0] = rc522_read_reg(PCD_CRC_RESULT_L_REG); pOutData[1] = rc522_read_reg(PCD_CRC_RESULT_H_REG); }
bool rc522_get_uid(uint8_t *uid_buffer) { uint8_t status; uint8_t tag_type[2]; uint8_t uid[5];
status = rc522_request(PICC_REQIDL, tag_type); if (status != 0x00) { if (DEBUG_ENABLED) { printf("RC522 Driver: No card detected or request failed (status: 0x%02X)\n", status); } return false; }
status = rc522_anticoll(uid); if (status != 0x00) { if (DEBUG_ENABLED) { printf("RC522 Driver: Anti-collision failed (status: 0x%02X)\n", status); } return false; }
memcpy(uid_buffer, uid, 4);
if (DEBUG_ENABLED) { printf("RC522 Driver: UID: %02X %02X %02X %02X\n", uid_buffer[0], uid_buffer[1], uid_buffer[2], uid_buffer[3]); } return true; }
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